The SDR-14 uses a 14bit ADC with a SNR of about 74 dB. This SNR is equivalent to about 12.3 bits. This SNR is based on the whole Nyquist band of 33.333 MHz when sampling at 66.666 MHz. In other words, the equivalent noise power is about -150 dBc/Hz , or 74+10*log10(33333333 Hz).
The SDR-14 uses a digital down-converter (DDC) processor chip that tunes a narrower bandwidth within this 33.333 MHz band. When the DDC processor is set to 100 kHz, for example, there is a "processing gain" of 10 log10 (33.333/0.1) = 25.2 dB, yielding a total of 99dB. Of course, one can reduce this bandwidth even more and get more dynamic range. The improvement is limited to the internal math precision of the post-processor which is 23 bits (138 dB).
A Google search on "digital down conversion processing gain" will yield more information.
So for the case of a 1 GHz ADC that has 2 effective bits, we end up with an SNR of 12dB over 500 MHz. If we go in with a DDC processor and filter 100 kHz of bandwidth, we end up with only -10 log (500/0.1) = -37 dB of that noise. If we keep our math precision high, we will have 12 + 37 = 49dB of SNR. It would be the same as having a 200 kHz ADC with 8 bits.
Copyright © 2005 Pieter Ibelings N4IP. Last updated:11/27/15