The IC-756PRO III DSP "core" is a complete 36 KHz transceiver in which all signal-handling functions, receiving and transmitting, are performed by the DSP chipset. The main DSP components are the DSP processor, the ADC (analogue/digital converter) and the DAC (digital/analogue converter). The IC-7800*, IC-7700*, IC-756Pro II, IC-756Pro and IC-746Pro (IC-7400) also feature this architecture.
In a restricted sense, our 36 kHz transceiver is a Software-Defined Radio (SDR), as its operating parameters are almost entirely defined in the DSP firmware.
Further reading on DSP: "The Scientist's and Engineer's Guide to Digital Signal Processing", by Steven W. Smith, Ph.D.
Software-Defined Radio White Paper, Wipro Technologies, August 2002
Software-Defined Radio Comes of Age, NTIA, Fall 2001
Other DSP references.
The analogue circuitry in the radio comprises the receive input amplifiers and down-converters to get to 36 KHz, and the up-converters and amplifiers required to generate the 100-watt output signal of the selected emission type. All modulation and demodulation functions are done in the DSP chipset. This includes the generation of the CW keying waveform, transmit audio equalisation, any speech processing (compression), etc.
The DSP chipset generates SSB by modelling an idealised phasing-type SSB exciter. It also generates a mathematically-precise double-sideband (DSB) AM signal, in which the amplitude of each sideband is exactly half the carrier amplitude at 100% modulation. Likewise, by modelling an idealised phase modulator with pre-emphasis, the DSP produces a mathematically-precise FM signal.
In CW mode, the DSP models an on-off keying waveform with rise and fall times appropriate to the selected keying speed, and optimised for acceptably "hard" keying at the receiver consistent with minimum occupied bandwidth. In RTTY mode, the DSP generates a mathematically-precise FSK signal.
The receiver AGC is derived within the DSP. There are two AGC loops; a digital loop which controls the input level to the demodulator (DET), and a digital/analogue loop with a dedicated DAC which controls the analogue IF level at the main ADC input. All DSP-IF filtering, including the Manual Notch, is inside the AGC loop; this eliminates AGC pumping (swamping). Note: The Auto-Notch and Noise Reduction (NR) are post-AGC.
The AGC attack time is a trade-off. If it is too long, there is a risk that a fast-rising signal wavefront or spike will over-range the ADC. As the AGC loop is DSP-derived, there will then be no AGC action until the spike disappears. If the signal is of constant level, the entire receiver will remain locked up until the signal is removed, as there is now no AGC action as long as the ADC is driven to or beyond its "all 1's" point.
Conversely, if the AGC attack time is too short, the AGC will clamp on a fast-rising signal wavefront or spike, thus desensing the receiver for the duration of the AGC hang/decay time.
Many of the newer Icom transceivers implement the noise blanker (NB) in the DSP. The NB process is upstream of the AGC derivation point, so the NB can be adjusted to eliminate impulsive RF events before they can stimulate AGC action.
The DSP demodulates each emission type by applying the inverse of the relevant modulation function (as described above).
The functional blocks of the "receiver section" of our 36 kHz DSP transceiver are well illustrated in this simplified block diagram.
The functional blocks of the "transmitter section" are now outlined in this simplified block diagram.
*Note: The IC-7800 main receiver down-converts directly from the 64.455 MHz1st IF to the 36 kHz final (DSP) IF, omitting the 455 kHz 2nd IF. The transmitter still up-converts from 36 kHz via 455 kHz to 64.455 MHz. Also, the IC-7800 AGC characteristics appear to differ somewhat from those of the IC-756Pro series.
The IC-7800 sub-receiver's first IF is 64.555 MHz.
IC-7000, IC-7200, IC-7600, IC-7700 and IC-7800.